Three-dimensional (3D) semiconductor devices typically include a thin 3D silicon fin that rises up vertically from a silicon substrate. When the 3D semiconductor device is a tri-gate transistor, the fins usually act as an active channel region of the tri-gate transistor. Such transistors are often referred to as “tri-gate transistors” as the channel is controlled by a gate on three sides. For many applications, it may be desired for a bottom portion of the fins (also referred to as a “sub-fin region”) to be doped with one or more dopant materials while a top portion of the fins (also referred to as a “top-fin region” and/or an “active fin region”) remains undoped. However, current semiconductor fabrication methods do not provide techniques for doping the sub-fin region without introducing competing carriers into the top-fin region and/or without damaging the fins of the 3D semiconductor structure.